written by Eric Bogatin, Orlando Bell, Gary Otonari, Arthur Fraser, Straty Argyrakis This is a paper presented at DesignCon 2002. Network class processors with more than 1000 high speed I/Os are becoming more important in the telecommunications backbone. This class of processor has higher off chip switching bandwidths, larger buss widths and a greater number of different busses compared with microprocessors. Because of the off chip features, the package signal integrity requirements are more severe. The combination of higher bandwidth, mostly differential signal lines and flip chip attach make the electrical characterization of these packages particularly challenging. We show how to fully characterize a package using a unique top- bottom probing system and a multi-port differential S parameter test system.